1. Field of the Invention
The invention relates to a synchronous transmission system comprising a circuit arrangement for determining the data bytes of a signal to be received or to be transmitted. Such a synchronous transmission system is meant to imply a system of the Synchronous Digital Hierarchy (SDH) or of a Synchronous Optical Network (SONET).
2. Description of the Related Art
Such a circuit arrangement of a synchronous transmission system is known from German Patent Application P 41 08 429, in which an STM-1 signal of the synchronous digital hierarchy is processed. The synchronous transmission system is used for determining and evaluating pointer bytes and for controlling the writing of data bytes, for example, of a received STM-1 signal. This system is further used for forming pointer bytes and for controlling the reading of the data bytes from the buffer for an STM-1 signal to be transmitted.
The STM-1 signal (Synchronous Digital Hierarchy signal) is structured in frames and comprises, in addition to the actual payload of the signal, control indication bits and justification data, which are referenced data gaps. An STM-1 frame comprises 270 columns and 9 rows (270 bytes per row). The rows 1 to 3 and 5 to 9, in all the columns 1 to 9 carry the Section Overhead (SOH) for overhead and error detection information bytes and the rest of the structure (AU payload) carries data of the signal, justification data and further Overhead bytes.
A plurality of different Containers (C-4, C-3, C-2, C-12 and C-11) can be accommodated in the AU-payload. A container is understood to mean the basic unit for carriage of digital payload. For example, an STM-1 frame can comprise an Administrative Unit AU-4 with a container C-4 for a 139.264 MbitYsec bit rate. It is alternatively possible that three administrative units AU-3 are accommodated in the STM-1 frame. For example, an administrative unit AU-3 thereof comprises a container C-3 for a 44.736 Mbit/sec bit rate. The second administrative unit AU-3 can comprise, for example, seven Tributary Unit Groups TUG-2s having each a container C-2 for a 6.312 Mbit/sec bit rate. Seven TUG-2s having each three containers C-12 for a 2.048 Mbit/sec bit rate can further be mapped into the third administrative unit AU-3. By appending control indication and justification indication bits to the containers, higher order high bit rate and low bit rate transport units (VC-4, VC-3, TU-3, TU-2, TU-12 and TU-11) are formed. A high bit rate transport unit (VC-4, VC-3) is understood to mean a transport unit that can contain further transport units. A low bit rate transport unit is understood to mean a transport unit that can contain no other transport units.
Said Patent Application has disclosed that each transport unit contained in an STM-1 signal has its own counter for counting the data bytes. For example, when an STM-1 signal with a VC-4, the one that contains only VC-12, is transmitted, the VC-4 and each VC-12 have their own counter. Afterwards the same circuit arrangement cannot be used for transmitting an STM-1 signal with a VC-4 that contains VC-11 until further counters for the VC-4 and for each VC-11 are available. Thus not the same counter as used for the VC-4 containing the VC-12 can be used for the VC-4 containing the VC-11. Every conceivable transport unit configuration in the STM-1 signal thus requires for each occurring transport unit its own counter that cannot be used for another transport unit configuration. Such a circuit arrangement is extremely expensive.